Press releases

Sheffield, England – 11 May 2023.

CryoCMOS Consortium develops 4K & 77K transistor models to enable CryoIP development:

The Innovate UK-funded CryoCMOS Consortium, led by sureCore Ltd, reports that it has successfully created new, PDK-quality, transistor models characterised for both 4K & 77K operation. SureCore is using these to develop key foundation IP to enable the design of cryo-control ASICs for use in the quantum computing space. Key to supporting this activity were the accurate cryogenic measurements undertaken by Incize of Louvain-la-Neuve, Belgium.

14 February, 2023
Semiwise-Led Consortium wins £354K Innovate UK Grant to Develop Power Electronic Sources Based on Virtual Manufacturing Concepts:

Glasgow United Kingdom: Innovate uk has awarded a grant of £354,982 to a consortium led by SemiWise with the remit to develop and deliver training courses for power electronic devices manufacturing companies in the UK ...

11-Nov-2022
Cryogenic CMOS design enabled by Semiwise

Semiwise has developed transistor SPICE models based on the GlobalFoundries (GF) 22FDX® Platform that enable cryogenic CMOS design and verification. Using its patented ‘re-centring’ technology Semiwise has developed models for typical (TT) fast (FF) and slow (SS) transistor corners. Using the Semiwise tool RECENTER, the models can be seamlessly included in the standard EDA tool flow based on the GF 22FDX Platform Process Design Kit (PDK).

The Semiwise’s Flat Field Transistor enables the continuation of DRAM scaling.

The Flat Field Transistor (FFT) developed by Semiwise offers a solution to the DRAM scaling problems improving dramatically the margins of the DRAM sense amplifiers.

Although the DRAM cell transistors have undergone a dramatic revolution from recess gate to saddle FinFET, for cost reasons, the DRAM sense amplifiers and periphery continue to be manufactured using conventional bulk MOSFETs.

Sheffield, UK. 5 November, 2021

sureCore-led consortium wins £6.5M Innovate UK grant to develop cryogenic CMOS IP to accelerate Quantum Computing scalability.

Startup enables cryogenic chip design to scale quantum computers

"Semiwise in Glasgow, UK, has developed IP and methodology for cryogenic process development kits (PDKs) that allow CMOS circuits optimised for quantum computers that operate at cryogenic temperatures to be manufactured by conventional foundries." eeNews

Enabling Cryogenic Chip Design and the Scaling of Quantum Computers

Multiple technologies have been demonstrated for generating and controlling qubits which are in the heart of every quantum computer (QC). However, QCs have only been realised with a few dozen qubits, whereas to unlock their potential, they need to be scaled to thousands or even millions of qubits.

Revolutionary Flat Field Transistor: Ideal for IoT application

The extremely low power Flat Field Transistor (FFT) technology developed by Semiwise is ideally suited for applications where low power is paramount i.e. Internet of Things (IoT) and on chip Artificial Intelligence (AI). It is applicable to 40 nm, 28 nm and 20 nm bulk CMOS technologies and scalable to future bulk technology generations.