The Flat Field Transistor (FFT) developed by Semiwise offers a solution to the DRAM scaling problems improving dramatically the margins of the DRAM sense amplifiers.
Although the DRAM cell transistors have undergone a dramatic revolution from recess gate to saddle FinFET, for cost reasons, the DRAM sense amplifiers and periphery continue to be manufactured using conventional bulk MOSFETs.
sureCore-led consortium wins £6.5M Innovate UK grant to develop cryogenic CMOS IP to accelerate Quantum Computing scalability.
Sheffield, UK. 5 November, 2021
Startup enables cryogenic chip design to scale quantum computers
"Semiwise in Glasgow, UK, has developed IP and methodology for cryogenic process development kits (PDKs) that allow CMOS circuits optimised for quantum computers that operate at cryogenic temperatures to be manufactured by conventional foundries." eeNews
Enabling Cryogenic Chip Design and the Scaling of Quantum Computers
Multiple technologies have been demonstrated for generating and controlling qubits which are in the heart of every quantum computer (QC). However, QCs have only been realised with a few dozen qubits, whereas to unlock their potential, they need to be scaled to thousands or even millions of qubits.
Revolutionary Flat Field Transistor: Ideal for IoT application
The extremely low power Flat Field Transistor (FFT) technology developed by Semiwise is ideally suited for applications where low power is paramount i.e. Internet of Things (IoT) and on chip Artificial Intelligence (AI). It is applicable to 40 nm, 28 nm and 20 nm bulk CMOS technologies and scalable to future bulk technology generations.