Press releases
1 May 2024, Glasgow, UK
Prof. Dennis Sylvester and PhD student Qirui Zhang are working with UK-based company Semiwise Ltd. to design cryogenic circuitry and improve the efficiency of quantum computing.
​
Researchers at the University of Michigan are leading a collaborative initiative with Semiwise, a Glasgow, UK-based company, to develop low-power and cryogenic control electronics, with the ultimate goal of scaling quantum computing for more practical applications.
Glasgow, Scotland, UK – 01 November 2023.
AI-generated representation of cryogenic computer circuitry (DALL-E)
Building an advanced semiconductor fabrication facility typically incurs a cost ranging from $10 billion to $20 billion. The expense of a single deep EUV stepper, at $500 million, exceeds that of an Airbus A380. Consequently, the challenge arises of how to train individuals to work within a costly semiconductor fabrication facility without imposing a burden on vital resources within an existing facility or constructing a new educational one. The solution mirrors the approach employed in training pilots to operate an Airbus A380: the use of virtual reality simulators.
Glasgow, UK – 31 May 2023.
Power Electronic Device Training Courses Like Never BeforePower electronic devices are in the heart of all power converter applications: power supplies, motors and drives, electric cars, solar panels, wind turbines. Better power electronic devices with as little power loses as possible determine the milage of the electric cars and the efficiency of the renewable energy sources. The projected growth of the power electronics semiconductor industry exceeds the projected growth for the rest of the semiconductor industry. The current downturn of the semiconductor industry has not affected much the power electronics device manufacturers.
Sheffield, England – 11 May 2023.
The Innovate UK-funded CryoCMOS Consortium, led by sureCore Ltd, reports that it has successfully created new, PDK-quality, transistor models characterised for both 4K & 77K operation. SureCore is using these to develop key foundation IP to enable the design of cryo-control ASICs for use in the quantum computing space. Key to supporting this activity were the accurate cryogenic measurements undertaken by Incize of Louvain-la-Neuve, Belgium.
Glasgow, UK - 14 February, 2023
Semiwise-Led Consortium wins £354K Innovate UK Grant to Develop Power Electronic Sources Based on Virtual Manufacturing Concepts:
Glasgow United Kingdom: Innovate uk has awarded a grant of £354,982 to a consortium led by SemiWise with the remit to develop and deliver training courses for power electronic devices manufacturing companies in the UK ...
The Flat Field Transistor (FFT) developed by Semiwise offers a solution to the DRAM scaling problems improving dramatically the margins of the DRAM sense amplifiers.
Although the DRAM cell transistors have undergone a dramatic revolution from recess gate to saddle FinFET, for cost reasons, the DRAM sense amplifiers and periphery continue to be manufactured using conventional bulk MOSFETs.
Startup enables cryogenic chip design to scale quantum computers
​
"Semiwise in Glasgow, UK, has developed IP and methodology for cryogenic process development kits (PDKs) that allow CMOS circuits optimised for quantum computers that operate at cryogenic temperatures to be manufactured by conventional foundries." eeNews
Enabling Cryogenic Chip Design and the Scaling of Quantum Computers
Multiple technologies have been demonstrated for generating and controlling qubits which are in the heart of every quantum computer (QC). However, QCs have only been realised with a few dozen qubits, whereas to unlock their potential, they need to be scaled to thousands or even millions of qubits.
​
Revolutionary Flat Field Transistor: Ideal for IoT application
The extremely low power Flat Field Transistor (FFT) technology developed by Semiwise is ideally suited for applications where low power is paramount i.e. Internet of Things (IoT) and on chip Artificial Intelligence (AI). It is applicable to 40 nm, 28 nm and 20 nm bulk CMOS technologies and scalable to future bulk technology generations.
​
​