It is commonly accepted that after laptops and smartphones, the next big semiconductor industry drivers will be the Internet of Things (IoT) and on chip Artificial intelligence (AI). The IoT has stringent requirements for ultra low (static and dynamic) power in order to facilitate a “fit and forget” installation practice by allowing batteries to last many years instead of days or months. Simultaneously, low chip costs will be essential for broad range of IoT applications, thus
focusing the attention on lower cost technologies such as 40 nm and 28 nm bulk CMOS.
 

However, leading experts in the major semiconductor manufacturers agree that currently there are no viable conventional (bulk) CMOS solutions that meet the stringent low power and high reliability requirement for IoT applications. FDSOI offers partial solution to this problem but at increased cost associated with the high cost of the FDSOI wafers.
 

Semiwise Ltd. has developed low power variability resistant bulk CMOS transistor technology that meets in full the IoT requirements. The Flat Filed Transistor (FFT) can be scaled to 20 nm bulk CMOS and beyond. Applied to 20 nm bulk CMOS it has 30% higher speed performance and two orders of magnitude lower leakage current at equivalent drive current compared to its bulk counterpart. Most importantly it has extremely low local (purely statistical) variability with Av factors in the range of 0.6 mV-μm, which is much lower than the reported variability in 14 nm FinFET and 28 nm FDSOI technologies. The extremely low variability of the FFT is ideally suited for near threshold and subthreshold logic and SRAM design that is now emerging as a necessity for next generation IoT and AI applications.
 

The Semiwise technology was developed by the Semiwise founder Asen Asenov using the leading GSS (now Synopsys) Variability aware TCAD simulations tools. Asenov is the world leading variability simulation expert.

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According to Asenov:

“The concept of variability resistant transistors has been around for a few years, however despite significant VC investments many companies have failed to commercialise the technology due to lack of firm understanding of statistical variability and adequate simulations capabilities. Armed with the most accurate and reliable simulation tools from GSS (now Synopsys) and more than 35 years of experience in the semiconductor industry, Semiwise will succeed where others have failed.”
 

About Semiwise

Semiwise has been operational since August 2017 and is already engaged with a number of major semiconductor manufacturers interested in evaluating the FFT technology. The Semiwise founder Professor Asen Asenov is the former CEO of Gold Standard Simulations (GSS), a leader in variability CMOS simulations and variability aware TCAD based DTCO. In May 2016 GSS was acquired by Synopsys and the corresponding tools are now in the heart of the Synopsys DTCO solutions. The Semiwise patents are developed by the Los Gatos New Business Architects Nif/T.
 

For further information please contact Asen Asenov: e-mail Asen.asenov@semi-wise.com; telephone +44 7532 293 782.