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Blogs - Sausages or Chips?

                

Sausages or Chips?

To be honest I like them both. However, this is not a culinary post. This is about the importance of the collaboration between UK and EU in the area of CMOS technology and design through participation in EU projects. The UK’s exclusion from the Horizon programme will hamper our capabilities to rebuild CMOS technology and design expertise and the corresponding research, training and entrepreneurship.
 
The government’s pledge that a potential exclusion from Horizon can be compensated by increasing the amount of UK research funding will not work in the CMOS area. UK will have no access to the technology capabilities of IMEC, LETI, MINATEC, Fraunhofer and Tindal and to project partners like GLOBALFOUNDRIES, Infineon, ST Microelectronics, NXP, X-Fab, Bosh and others.
 
I would like to illustrate the role of the EU collaboration for the establishment, the growth and the success of my former TCAD company Gold Standard Simulation (GSS) by listing the role of the key EU projects in which we were involved:
 
ENIAC MODERN (2009) “MOdeling and DEsign of Reliable, process variation-aware
Nanoelectronic devices, circuits and systems” (ST Microelectronics (STM), Austria Microsystems, NXP Semiconductors, CEA-LETI, Synopsys and others). Although the UK decided not to fund this ENIAC project, I secured funding form Scottish Enterprise (SE) and EPSRC for the Glasgow University participation. GSS became a subcontractor creating the commercial version of the ‘atomistic’ TCAD simulator GARAND developed in my Device Modelling Group and licenced to GSS. GARAND was validated against state-of-the-art 40nm and 28nm CMOS measurements at STM.
 
TRAMS (2009) Terascale Reliable Adaptive Memory Systems (IMEC, Intel) played key role in the development of the GSS statistical compact model extractor Mystic and the statistical circuit simulation engine RandomSpice capable of predicting the impact of atomic scale variability on the yield of large SRAM arrays.
 
SUPERTHEME (2012) Circuit Stability Under Process Variability and Electro-Thermal-Mechanical Coupling (Frounhofer IISB, Austria Microsystems, ASML) played a key role in the development of the first TCAD based DTCO flow by GSS, including process induced and purely statistical variability.
 
Three Horizon projects SUPERAID7, CONNECT and REMINDER solidified the exit potential of GSS in 2016, enabling the development of the most advanced and comprehensive DTCO tool chain offered presently by Synopsys and used by the major advanced semiconductor manufacturers worldwide. As a result a 30 strong Synopsys R&D TCAD and DTCO centre was established in Glasgow.
 
Thus, the EU projects and collaborations provided GSS with crucial access to the knowledge and expertise of Intel, ST Microelectronics, NXP, Austria Microsystems, ASML, Synopsys, IMEC, CEA-LETI and others, enabling our success. GARAND, MYSTIC and RANDOM SPICE are now part of the Synopsys DTCO flow used by the major CMOS players worldwide. #semiconducto

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